Program

Wednesday, September 1, 2021

Time Event (+)
08:30 - 08:50 Welcome desk  
08:50 - 09:00 Welcome Address  
09:00 - 10:20 Characterisation and simulation of nanometer scale devices - Session Chair: Eddy Simoen (imec, Belgium) (+)  
09:00 - 09:20 › Cryogenic Behavior of 22 nm FDSOI Technology for Quantum Computing - Hung-Chi Han, Ecole Polytechnique Fédérale de Lausanne  
09:20 - 09:40 › Si thickness influence on subthreshold currents at high temperatures in FDSOI CMOS - Per-Erik Hellström, KTH Royal Institute of Technology  
09:40 - 10:00 › Avalanche Transient Simulations of SPAD integrated in 28nm FD-SOI CMOS Technology - Dylan Issartel, Univ Lyon, CNRS, INSA Lyon, Université Claude Bernard Lyon 1, CPE Lyon, Ecole Centrale de Lyon, INL  
10:00 - 10:20 › Combined effects of BTI, HCI and OFF-State MOSFETs Aging on the CMOS Inverter Performance - Albert Crespo-Yepes, Universitat Autònoma de Barcelona  
10:20 - 10:40 Coffee break  
10:40 - 11:20 The concept of electrostatic doping and related devices - Sorin Cristoloveanu  
11:20 - 12:00 Advanced and Innovative SOI Architectures (I) - Session Chair: Eddy Simoen (imec, Belgium) (+)  
11:20 - 11:40 › Impact of the Backgate on the Performance of SOI UTBB nMOSFETs at Cryogenic Temperatures - Yi Han, Faculty of Mathematics, Computer Science and Natural Sciences, RWTH Aachen University, Peter Grünberg Institute (PGI 9) and JARA-Fundamentals of Future Information Technologies, Forschungszentrum Jülich GmbH  
11:40 - 12:00 › Dopant activation and recrystallisation process in nanosecond UV-laser annealed phosphorus doped ultra-thin SOI - Fuccio CRISTIANO, Laboratoire d'analyse et d'architecture des systèmes  
12:00 - 14:00 Lunch Break  
14:00 - 14:40 Charge-based models and Field Effect Transistors: make it easy - Jean-Michel Sallèse  
14:40 - 15:20 Simulation and Modelling (I) - Session Chair: Jean-Michel Sallèse (EPFL, Switzerland) (+)  
14:40 - 15:00 › Analysis of Energy-Delay-Product of a 3D Vertical Nanowire FET Technology - Ian O'Connor, Institut des nanotechnologies de Lyon - Site d'Ecully - Chhandak Mukherjee, Laboratoire de líntégration, du matériau au système  
15:00 - 15:20 › Operational Transconductance Amplifier Design with Gate-All-Around Nanosheet MOSFET using Experimental Lookup Table Approach - Julia Sousa, University of São Paulo  
15:20 - 15:40 Coffee break  
15:40 - 19:00 Poster - Session Co-Chairs: Viktor Sverdlov (TU Wien, Austria), Bogdan Cretu (ENSICAEN, France) (+)  
15:40 - 15:50 › Modeling the propagation of ac signal on the channel of pseudo-MOS method - Shingo Sato, Kansai University  
15:50 - 16:00 › The effects of surface passivation on the electrostatics of the UTB SOI devices - Ravi Solanki, Indian Institute of Science, Education and Research  
16:00 - 16:10 › Effect of Temperature on Performance of HZO-Based FD-SOI NCFET - K P Pradhan, Indian Institute of Information Technology, Design and Manufacturing [Kancheepuram]  
16:10 - 16:20 › TCAD based Modeling of Sub-surface Leakage in Short Channel Bulk MOSFETs - Harshit Kansal, Indian Institute of Science Education and Research Bhopal  
16:20 - 16:30 › RF performances at cryogenic temperature of inductances integrated in FDSOI technology - Quentin Berlingard, Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI)  
16:30 - 16:40 › Impact of High-Aspect-Ratio Etching Damage on Selective Epitaxial Silicon Growth in 3D NAND Flash Memory - Tobias Reiter, Institute for Microelectronics, Vienna University of Technology  
16:40 - 16:50 › Silicon and hafnia thin film transfer on c-plane sapphire: Effect of substrate thickness on the hafnia ferroelectric properties - Vladimir Popov, A.V. Rzhanov Institute of Semiconductor Physics  
16:50 - 17:00 › Investigation of the Invariant Drain Current Point in Dielectric Modulated BESOI MOSFET Biosensor - Leonardo Yojo, University of São Paulo  
17:00 - 17:10 › The Semiconductor Model Solved by the Numerov Process Over a Non-Uniform Grid - Massimo Rudan, Alma Mater Studiorum Università di Bologna [Bologna]  
17:10 - 17:20 › Conductance modulation in Al/SiO2/n-Si MIS resistive switching structures - Piotr Wiśniewski, Centre for Advanced Materials and Technologies CEZAMAT, Warsaw University of Technology, Center for Terahertz Research and Applications (CENTERA), Institute of High-Pressure Physics, Polish Academy of Sciences  
17:20 - 17:40 › Incorporation of silicon-carbide (SiC) nanocrystals in the MIM structures based on pulsed-DC reactively sputtered HfOx layers - Robert Mroczyński, Warsaw University of Technology [Warsaw]  
17:40 - 17:50 › TCAD Negative Capacitance Ferroelectric Devices Modeling for Radiation Detection Applications - Arianna Morozzi, Istituto Nazionale di Fisica Nucleare, Sezione di Perugia  
17:50 - 18:00 › Junctionless Nanowire Transistors Based Wilson Current Mirror - André Shibutani, Centro Universitário FEI  
18:00 - 18:10 › Improving the Photon Detection Probability of SPAD Implemented in FD-SOI CMOS Technology with light-trapping concept - Shaochen Gao, Univ Lyon, CNRS, INSA Lyon, Université Claude Bernard Lyon 1, CPE Lyon, Ecole Centrale de Lyon, INL  
18:10 - 18:20 › Conductance of Edge Modes in Nanoribbons of 2D Materials in a Topological Phase - Viktor Sverdlov, CDL NovoMemLog, Institute for Microelectronics, TU Wien  
18:20 - 18:30 › Feature-Scale Modeling of Isotropic SF6 Plasma Etching of Si - Luiz Felipe Aguinsky, Christian Doppler Laboratory for High Performance TCAD, Institute for Microelectronics, TU Wien, Gußhausstraße 27-29, 1040 Wien, Austria  
18:40 - 18:50 › Use of CMOS Image Sensor for early detection of ischemic and hemorrhagic stroke - Fabrizio Palma, Rome University La Sapienza, Università di Roma La Sapienza, DIET  
18:50 - 19:00 › Constant-current time dependent dielectric breakdown in thick amorphous SiO2 capacitors - Federico Giuliano - University of Bologna  
19:15 - 20:30 Cocktail Town Hall of Caen  

Thursday, September 2, 2021

Time Event (+)
09:00 - 10:20 Beyond and More than Moore devices characterisation/simulation and applications (I) - Session Chair: Pierpaolo Palestri (University of Udine, Italy) (+)  
09:00 - 09:20 › Modeling Low and High Field Uniform Transport in Monolayer MoS2 - alessandro pilotto, DPIA University of Udine  
09:40 - 10:00 › Synaptic transistors based on transparent oxide for neural image recognition - Q N Wang, AI University Research Centre (AI-URC), Xi'an Jiaotong-Liverpool University, Department of Electrical Engineering and Electronics, University of Liverpool, School of Advanced Technology, Xi'an Jiaotong-Liverpool University  
10:00 - 10:20 › Thermal Stability of Ferroelectricity in Hafnia-Zirconia-Alumina Buried Oxide Stacks - Vladimir Popov, A.V. Rzhanov Institute of Semiconductor Physics  
10:20 - 10:40 Coffee break  
10:40 - 11:20 Engineering Trap-Rich layers for communication applications - Frederic Allibert  
11:20 - 12:00 Advanced and Innovative SOI Architectures (II) - Session Co-Chairs: Pierpaolo Palestri (University of Udine, Italy), Bogdan Cretu (ENSICAEN, France) (+)  
11:20 - 11:40 › High performance silicon-based substrate using buried PN junctions towards RF applications - Maxime Moulin, CEA-Leti  
11:40 - 12:00 › New 10V to 1V level shifter based on new N/PMOS high voltage in FDSOI technology - Philippe Galy, STMicroelectronics [Grenoble]  
12:00 - 14:00 Lunch Break  
14:00 - 14:40 If you cannot beat CMOS with TFETs, you join it with TFTs and sensors - Alexander Zaslavsky  
14:40 - 15:20 Beyond and More than Moore devices characterisation/simulation and applications (II) - Session Chair: Alexander Zaslavsky (Brown University, USA) (+)  
14:40 - 15:00 › Improved inter-device variability in graphene liquid gate sensors by laser treatment - Jorge Avila, Nanoelectronics Research Group (CITIC-UGR), Department of Electronics, University of Granada, 18071, Granada, Spain - Jose Galdon, Nanoelectronics Research Group (CITIC-UGR), Department of Electronics, University of Granada, 18071, Granada, Spain - Francisco Gamiz, Nanoelectronics Research Group (CITIC-UGR), Department of Electronics, University of Granada, 18071, Granada, Spain  
15:00 - 15:20 › Numerical Device Modeling of High-Aspect Ratio FinFET based pH-Nanosensor - Rakshita Dhar, University of Glasgow  
15:20 - 15:40 Coffee break  
15:40 - 16:20 Advanced and Innovative SOI Architectures (III) - Session Chair: Frederic Allibert (SOITEC, France) (+)  
15:40 - 16:00 › A theoretical study of electron mobility distribution in FDSOI MOSFET - Nima Dehdashti Akhavan, The University of Western Australia  
16:00 - 16:20 › Performance of Stacked SOI Nanowires in a Wide Temperature Range - Jaime Rodrigues, Centro Universitário FEI - Sylvain Barraud, Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI)  
16:20 - 17:20 Modelling and Characterisation - Session Chair: Frederic Allibert (SOITEC, France) (+)  
16:20 - 16:40 › Characterization and Lambert-W Function based modeling of FDSOI five-gate qubit MOS devices down to cryogenic temperatures - Edoardo Catapano, Commissariat à l\'énergie atomique et aux énergies alternatives - Laboratoire dÉlectronique et de Technologie de lÍnformation, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d\'Hyperfréquences et Caractérisation  
16:40 - 17:00 › High Temperature Influence on the Trade-off between gm/ID and fT of nanosheet NMOS Transistors with Different Metal Gate Stack - Vanessa Silva, University of São Paulo  
17:00 - 17:20 › Comprehensive Kubo-Greenwood modelling of FDSOI MOS devices down to deep cryogenic temperatures - Francesco Serra di Santa Maria, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d\'Hyperfréquences et Caractérisation  
17:25 - 19:00 city center Caen - Tour  
19:30 - 23:30 Gala Dinner  

Friday, September 3, 2021

Time Event (+)
09:00 - 10:20 Noise characterisation - Session Chair: Sorin Cristoloveanu (IMEP-LAHC, France) (+)  
09:00 - 09:20 › Low temperature investigation of n-channel GAA vertically stacked silicon nanosheets - Bogdan Cretu, Groupe de Recherche en Informatique, Image, Automatique et Instrumentation de Caen  
09:20 - 09:40 › Random Telegraph Noise real time testing based on downsampling for mass data extraction - Maximilian Juettner, HTW Dresden  
09:40 - 10:00 › In-situ recovery of on-membrane PD-SOI MOSFET from TID defects after  radiation - Sedki Amor, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Physics Department, Faculty of Sciences of Monastir, Electronics and Micro-Electronics Laboratory, Monastir. TUNISIA.  
10:00 - 10:20 › On the Asymmetry of the DC and Low-Frequency Noise Characteristics of Vertical Nanowire pMOSFETs with Bulk Source Contact - Eddy Simoen, IMEC  
10:20 - 10:40 Coffee break  
10:40 - 12:00 Simulation and Modelling (II) - Session Chair: Sorin Cristoloveanu (IMEP-LAHC, France) (+)  
10:40 - 11:00 › Curvature-Based Feature Detection for Hierarchical Grid Refinement in Epitaxial Growth Simulations - Christoph Lenz, Christian Doppler Laboratory for High Performance TCAD at the Institute for Microelectronics, TU Wien  
11:00 - 11:20 › On the Breakdown Voltage Temperature Dependence of High-Voltage Power Diode Passivated with Diamond-Like Carbon - Luigi Balestra - ARCES Research Center and DEI, University of Bologna University of Bologna Bologna, Italy  
11:20 - 11:40 › First Principles Approach to Study Topologically Protected Edge States in 1T′ MoS2 Nanoribbons - Viktor Sverdlov, CDL NovoMemLog, Institute for Microelectronics, TU Wien  
11:40 - 12:00 › Impact of different types of planar defects on current transport in Indium Phosphide (InP) - Christian Vedel, Device Modeling Group, School of Engineering, University og Glasgow, Glasgow G12 8QQ, Synopsys Denmark ApS, 2100 Copenhagen  
12:00 - 14:00 Lunch Break  
14:00 - 14:40 Unique features that make FDSOI CMOS ideal for RF, mm-wave and quantum computing applications - Sorin Voinigescu  
14:40 - 15:20 Advanced and Innovative SOI Architectures (IV) - Session Chair: Cor Claeys (K.U. Leuven, Belgium) (+)  
14:40 - 15:00 › Field-Effect Passivation of Lossy Interfaces in High-Resistivity RF Silicon Substrates - Martin Rack, Université Catholique de Louvain  
15:00 - 15:20 › Charge Pumping-Based Method for Traps Density Extraction in Junctionless Transistors - Ewerton Fonte, Centro Universitário FEI - Rodrigo Doria, Centro Universitário FEI - Renan Doria, Universidade Federal do ABC  
15:20 - 15:40 Coffee break  
15:40 - 16:20 Beyond and More than Moore devices characterisation/simulation and applications (III) - Session Chair: Cor Claeys (K.U. Leuven, Belgium) (+)  
15:40 - 16:00 › Device simulations of ion-sensitive FETs with arbitrary surface chemical reactions - Leandro Julian Mele, DPIA University of Udine  
16:00 - 16:20 › An artificial synaptic thin-film transistor based on 2D MXene–TiO2 - Yixin Cao, School of Advanced Technology, Xi'an Jiaotong-Liverpool University, Department of Electrical Engineering and Electronics, University of Liverpool, AI University Research Centre (AI-URC), Xi'an Jiaotong-Liverpool University  
16:20 - 17:20 III-V and memory oriented devices - Session Chair: Cor Claeys (K.U. Leuven, Belgium) (+)  
16:20 - 16:40 › Investigation of proton irradiation effects on AlGaN/GaN HEMTs with different buffer layer - eunjin kim, Kyungpook National University [Daegu]  
16:40 - 17:00 › Si/Si0.7Ge0.3 A2RAM nanowires fabrication and characterization for 1T-DRAM applications - JORIS LACORD, CEA-LETI  
17:00 - 17:20 › Temperature Increase in MRAM at Writing: A Finite Element Approach - Tomáš Hadámek, Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic at the Institute for Microelectronics, TU Wien - Viktor Sverdlov, Institute for Microelectronics, TU Wien  
17:20 - 17:25 Closing session  
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